Dr. V. G. Puranik


NAME: Dr. V. G. Puranik
DESIGNATION :   Assistant Professor
QUALIFICATION :  

  • Ph.D (E&TC)-Dr.Babasaheb Ambedkar Marathwada University, Aurangabad, Maharastra,2022
  • M.E.(Electronics)- Jawaharlal Nehru Engineering College, Aurangabad, Maharashtra,2007
  • B.E. (IE)- TPCT’s College of Engineering. Osmanabad,2003

OVERVIEW OF PROFILE:

Dr. Vishal Puranik is an Assistant Professor in the School of E&TC Engineering. His research interest lies in the broad domain of Embedded Sytem, E&TC Engineering. Dr. Vishal Completed his Ph.D. from Dr.Babasaheb Ambedkar Marathwada University, Aurangabad, Maharastra.

Fore Front Area of Research: Embedded System.
Email id : vishal.puranik@mitaoe.ac.in
Contact no: 020-30253500
Experience  : Teaching :20 Years


  • Recipient of 4th Smt. Kamal Sharma Award for Academic Excellence 2023
  • Recognized Ph.D Guide at JJTU, Rajasthan

Memberships

  • ISTE
    L. Member No. 58954
  • IETE
    L.Member No. 237629

PUBLICATIONS


Papers/ Patents Publication at Number
National Level 13
International Level 20
UGC Care 03
Scopus Journal 01
Patents at National Level 01
Patents at International Level 01

  1. Vishal Gangadhar Puranik ,D.K. Mohanty, G.R. Thippeswamy ,G.Erappa, “Quality of Video Rendering Techniques using Artificial Intelligence”, ICTACT JOURNAL ON IMAGE AND VIDEO PROCESSING, February- 2023, Vol: 13, ISSUE: 03,pp.2940-2946.
  2. Vishal Gangadhar Puranik , S.Vijayarangam , Kavita V Wagh , and S. Selvakanmani “Improving the Security based Routing Protocol for Wireless Sensor Networks”, ICTACT JOURNAL ON COMMUNICATION TECHNOLOGY, MARCH 2023, VOLUME: 14, ISSUE: 01,pp.2889-2893.
  3. Vishal G. Puranik, “Improved and Evolutionary Software-based scheduling Technique for Embedded Cores”, 2nd International Conference for Convergence in Technology (I2CT), Apr 7-9, 2017.
  4. Vishal G.Puranik, Dr. Dilip D. Shah, “iterations based optimization of fault detection technique for software-based self-test scheduling”, International Journal of Research in Electronics and Computer Engineering, vol.5, Issue.4, pp.520-523,2017.
  5. Vishal Gangadhar Puranik, Dilip Devchand Shah, “Fault Detection Attainment for Embedded Cores based on Software Test Routines”, Journal of VLSI Design Tools & Technology, vol.8, Issue.1,pp.1-6, 2018.
  6. Puranik Vishal . G, Dilip D. Shah, “Optimization of Scheduling Technique Rooted on Software Test Routines for Embedded Cores using Quality Factor”, International Journal of Innovative Technology and Exploring Engineering, vol.9, Issue.3, pp.204- 2038, 2020.